itpp_sci  1.0.0
it++ based simulation framework for scicoslab, scilab and scipy
Public Member Functions | List of all members
SIM::circbuff_x Class Reference

complex circular buffer
Core functions SIM::circbuff_x.process() SIM::circbuff_x.generate()
More...

Inheritance diagram for SIM::circbuff_x:
Inheritance graph
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Public Member Functions

 circbuff_x ()
 
 ~circbuff_x ()
 
void set_size (int m)
 
void set_output (complexd yout)
 
int get_size ()
 
complexd get_output ()
 
cvec generate (const bvec &ce)
 
cvec process (const bmat &ceio, const cvec &x)
 

Detailed Description

complex circular buffer
Core functions SIM::circbuff_x.process() SIM::circbuff_x.generate()

itpp::circular_buffer<complex> derived class with clocked interface

Constructor & Destructor Documentation

SIM::circbuff_x::circbuff_x ( )
inline
SIM::circbuff_x::~circbuff_x ( )
inline

Member Function Documentation

cvec SIM::circbuff_x::generate ( const bvec &  ce)

for active clock ticks [ce] fetch sample and and put back into the buffer
if (ce) {yout = get(); put(yout);

Parameters
ce- [bvec] clock_enable vector
Returns
y - [cvec]
complex< double > SIM::circbuff_x::get_output ( void  )

get output value

Returns
- [double] y0
int SIM::circbuff_x::get_size ( void  )

get buffer size

Returns
- [int] buffer size
cvec SIM::circbuff_x::process ( const bmat &  ceio,
const cvec &  x 
)

for active input clock ticks [cei] put input samples [x]
if (cei[i]) { put(x[i]) }
for active output clock ticks [ceo] update y by fetching one sample
if (ceo[i]) { yout = get() }

Parameters
ceio- [bmat][cei|ceo] input/output clock_enable vector
x- [cvec] - input samples
Returns
y - [cvec] - output samples
void SIM::circbuff_x::set_output ( complexd  yout)

set output value y0

Parameters
[in]yout- [complex] y0
void SIM::circbuff_x::set_size ( int  m)

set buffer size

Parameters
[in]m- buffer size

The documentation for this class was generated from the following files: