itpp_sci  1.0.0
it++ based simulation framework for scicoslab, scilab and scipy
Public Member Functions | List of all members
SIM::bert Class Reference

BERT - Bit Error Rate Tester
Core function SIM::bert.process()
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Inheritance diagram for SIM::bert:
Inheritance graph
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Public Member Functions

 bert ()
 
 ~bert ()
 
void set_prbs (int M)
 
void set_poly (const bvec &bpoly)
 
void set_symbol_size (int W)
 
void set_length (int L)
 
void set_threshold (const ivec &T)
 
void set_fsm (bert_fsm_state state)
 
void set_output (bert_fsm_state yout)
 
void set_adr (bert_adr a)
 
int get_length (void)
 
int get_symbol_size (void)
 
ivec get_threshold (void)
 
ivec get_cnt (void)
 
ivec get_acc_cnt (void)
 
int get_metrics ()
 
bert_fsm_state get_fsm (void)
 
bvec get_state ()
 
bvec get_poly ()
 
bert_fsm_state get_output (void)
 
void clear_counters (void)
 
ivec process (const bvec &ce, const bmat &x)
 

Detailed Description

BERT - Bit Error Rate Tester
Core function SIM::bert.process()
.


For active clock tick ce[i], input symbols x[i,:] are shifted into X LSR and internally generated PRBS symbols y[i,:] are shifted into Y LSR.
When BERT_FSM is in SYNC state, bit differences between x[i,:],y[i,:] symbols are accumulated in counters - accessible by get_cnt(), get_acc_cnt().
Metrics = sum(xor(X,Y)) is a number of bit differences between states of X,Y LSR (X[0:L-1], Y[0:L-1]).
Metrics, together with thresholds [T0,T1,T2] is used in BERT_FSM state transitions.
Instant change of state is possible only in SYNC, nSYNC states.
In RELOAD state BERT acquires number of bits greater of equal with the length internal PRBS generator and after transits to PRESET state.
In transition from RELOAD to PRESET state, data shifted into X synchronize PRBS to the input bit stream by setting the state of PRBS using acquired input bits.
PRESET requires acquisition of L bits before making a transition.
In PRESET state data both shifted into X,Y - yet Y symbols are generated by PRBS
Bit errors are updated only in SYNC state
BERT_FSM can transition to SYNC state if (metrics < T0) but exits SYNC state if (metrics > T1)
For operation BERT counter requires setting:
W - symbol size for X,Y LSR and PRBS LFSR
L - length of X,Y LSR - X.lenght >= PRBS.lenght due to PRBS X pre-setting in RELOAD state
M - PRBS generator index or LFSR taps [bvec]
[T0,T1,T2] - thresholds for state transitions
BER is to be calculated as BER=(err_cnt)/(bit_cnt)
There are two error counters
- instant values with auto reset after readout with get_cnt()
- permanent values accessible via get_acc_cnt()
BER= (T0/L) is estimation of maximum BER value measurable by BERT, since BER>(T1/L) causes transition to nSYNC state

Constructor & Destructor Documentation

SIM::bert::bert ( )
inline
SIM::bert::~bert ( )
inline

Member Function Documentation

void SIM::bert::clear_counters ( void  )

reset all counters

ivec SIM::bert::get_acc_cnt ( void  )

Get accumulated counters

Returns
- [ivec] [acc_cnt_err, acc_cnt_bit]
ivec SIM::bert::get_cnt ( void  )

Get counters

Returns
- [ivec] [cnt_err, cnt_bit]
bert_fsm_state SIM::bert::get_fsm ( void  )

Get current FSM state

Returns
- [bert_state] BERT_FSM
int SIM::bert::get_length ( void  )

get length of shift registers X,Y

Returns
- [int] length
int SIM::bert::get_metrics ( void  )

Get current value of metrics

Returns
- [int] sum(xor(X[],Y[]))
bert_fsm_state SIM::bert::get_output ( void  )

get initial/idle output state

Returns
- [bvec] y0 is BERT_FSM
bvec SIM::bert::get_poly ( void  )

get connection poly of internal PRBS generator

Returns
- [bvec] poly_gen
bvec SIM::bert::get_state ( )

get state of shift register addressed by last bert.set_adr() command

Returns
- [bvec] state of shift X,Y,PRBS register
int SIM::bert::get_symbol_size ( void  )

get size of input X,Y symbol

Returns
- [int] length of the symbol
ivec SIM::bert::get_threshold ( void  )

Get metrics thresholds

Returns
- [ivec] [T0,T1,T2]
ivec SIM::bert::process ( const bvec &  ce,
const bmat &  x 
)

\ For active clock ticks ce[i] input symbol x[i,:] is compared with internally generated symbol y[i,:].
x[i,:],y[i,:] are shifted into X,Y LSR, metrics is calculated , and using metrics thresholds BERT_FSM state is set.
Bit errors sum(xor(x,y)) are accumulated in error counters when BERT is in the SYNC state.

Parameters
ce- [bvec] clock_enable vector
x- [bmat] input binary symbol to be compared with internally generated y[i,:] by PRBS LFSR
Returns
y - [ivec] internal state BERT_FSM ;
void SIM::bert::set_adr ( bert_adr  a)

sets indirect register target for get_state()

Parameters
[in]a- [bert_adr] must be BERT_ADDR address
void SIM::bert::set_fsm ( bert_fsm_state  state)

sets FSM state

Note
default state is BERT_RESET
Parameters
[in]state- [int] valid state is one of a BERT_FSM states
void SIM::bert::set_length ( int  L)

set length of shift X,Y register - see SIM::lsr.set_length()

Note
X.length >= PRBS.lenght due to PRBS X pre-setting in RELOAD state
Parameters
[in]L- [int] size of shift register
void SIM::bert::set_output ( bert_fsm_state  yout)

sets initial/idle output state

Parameters
[in]yout- [bert_state] y0 = yout, must be BERT_FSM states
void SIM::bert::set_poly ( const bvec &  bpoly)

set predefined bpoly for PRBS - see SIM::lfsr.set_poly()

Parameters
[in]bpoly- [bvec] feedback poly
void SIM::bert::set_prbs ( int  M)

set predefined bpoly for PRBS defined by PRBS sequence 2^M-1 -see SIM::lfsr.set_prbs()

Parameters
[in]M- [int] power of PRBS sequence size = 2^M-1
void SIM::bert::set_symbol_size ( int  W)

set symbol_size

Parameters
[in]W- [int] number of bits in a symbol
void SIM::bert::set_threshold ( const ivec &  T)

set thresholds vector T=[T0,T1,T2] defining a state transition for calculated metrics

Note
see BERT_FSM for state definition
T0>T1>T2; T0/N is max BER to be measured
Parameters
[in]T- [ivec] = [T0,T1,T2]

The documentation for this class was generated from the following files: